[DO NOT MERGE] Coarse/fine setup-repair phases — CI QoR evaluation#4
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mguthaus wants to merge 1994 commits into
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[DO NOT MERGE] Coarse/fine setup-repair phases — CI QoR evaluation#4mguthaus wants to merge 1994 commits into
mguthaus wants to merge 1994 commits into
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…t-staging/secure-rsz-fix-tie-placement
Signed-off-by: Arthur Koucher <arthurkoucher@precisioninno.com>
Adds a checkpoint-based code path for SYNTH_BLACKBOXES to synth.tcl, distinct from the existing source-based path in synth_preamble.tcl in two intentional ways: it runs before `hierarchy -check -top` (the design is already elaborated when read from RTLIL, so blackbox operates on resolved modules), and it wraps `blackbox` in `catch` (unknown names are silently skipped because the same SYNTH_BLACKBOXES list is shared across partitions). The synth_preamble.tcl path keeps its existing strict behaviour: `hierarchy -check -top` first to elaborate the deferred verilog top, and `blackbox` errors loudly so a typo in a single-design SYNTH_BLACKBOXES list surfaces immediately. Why this is needed: parallel partition synthesis with slang. When `--keep-hierarchy` is used (required for partition flows that preserve internal hierarchy), the slang frontend mangles module names by their elaboration path so different parameterizations get distinct names — `Foo` instantiated at `top.unit.foo` becomes `Foo$top.unit.foo` in the elaborated RTLIL. The parent design references those mangled names. A "per-partition canonicalize from RTL" approach therefore can't just elaborate `Foo` as a fresh top — that would emit a module named `Foo`, but the parent design instantiates `Foo$top.unit.foo`, and the link fails. The driver has to canonicalize the full design once (so all parameterized instances get their elaborated names), and each partition then loads that shared checkpoint and blackboxes the modules outside its scope. That's the orchestrator pattern: every partition reads the same canonical RTLIL checkpoint and blackboxes the modules that belong to other partitions, so it only synthesises its own subhierarchy. SYNTH_BLACKBOXES is already documented in variables.yaml. No behaviour change when the env var is unset. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
add slash Signed-off-by: Jeff Ng <jeffng@precisioninno.com>
…t-staging/rapidus2hp-designs-gitignore Added rapidus2hp to gitignore
…boxes-for-parallel-partition synth: blackbox SYNTH_BLACKBOXES modules before hierarchy check
…-r-values update asap7 layer resistance with segment-based regression results
Adds Bazel-based design builds via bazel-orfs as a beta test alongside the existing Make flow. Lets users build ORFS designs with Bazel using the same config.mk files. Key changes: - MODULE.bazel: pin bazel-orfs at 78f19f25cec7 with yosys-slang plugin for slang HDL frontend; pin tools/OpenROAD via local_path_override. - flow/scripts/variables.yaml: register LIB_MODEL, MIN_CLK_ROUTING_LAYER, SDC_FILE_EXTRA, SYNTH_NUM_PARTITIONS, MOCK_ALU_OPERATIONS, MOCK_ALU_WIDTH so designs that use them pass bazel-orfs variable validation. - flow/designs/**/BUILD.bazel: add orfs_design() entry points for all public-PDK designs across asap7, sky130hd, sky130hs, nangate45, gf180, ihp-sg13g2. - flow/designs/src/**/BUILD.bazel: filegroup/exports_files for design source trees referenced via VERILOG_FILES. - flow/scripts/run_command.py: strip Bazel runfiles env vars before spawning subprocesses so child make invocations don't inherit them. - bazel-orfs.md: usage documentation, target conventions, working/blocked designs, and known limitations. Bumps tools/OpenROAD submodule to latest origin/master (26Q2-876-g45b7772b73) for the openroad/qt-bazel/yosys-slang integration that the new bazel-orfs relies on. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
- flow/BUILD.bazel: use .get(pdk, []) instead of [pdk] for the
per-PDK extension dict so adding a PDK to the iteration list without
a matching dict entry no longer crashes with KeyError.
- flow/designs/gf180/uart-blocks/rules-base.json: revert to master's
version. The branch's regenerated copy had constraints__clocks__count
dropped to 0 (timing constraints not applied) and was missing
synth__design__instance__area__stdcell.
- flow/designs/src/{aes,ethmac,gcd}/BUILD.bazel: include *.sv in the
verilog filegroup glob so it matches exports_files and the rest of
the design BUILD files (allow_empty since none currently exist).
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Run yaml_to_json.py and generate-variables-docs.py so the generated artifacts match the new entries added to variables.yaml in the bazel-orfs beta-test commit. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Drop the early-version framing, per-platform design lists (discoverable via bazelisk query), known-failure inventory (rots fast), and the "workflow / unmerged commits" prose. Keep target conventions, how to add a design, local override, --jobs caveat, and the non-public PDK note. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Their platform files are not in this repo, so the auto-generated orfs_design() targets would not resolve. Excluding them here keeps wildcard queries and globs clean. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
The security pre-commit hook blocks the names. The directories have no BUILD.bazel files and orfs_designs doesn't list those platforms, so they're already excluded from the bazel build. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Introduce design() and files() macros in flow/designs/design.bzl so each per-design BUILD shrinks to two lines. The bazelisk //flow/designs/<platform>/<design>:<n>_test interface is unchanged. Drop the Non-public PDKs section from bazel-orfs.md (security hook blocks the names; auto-generation already only scans the platforms listed in MODULE.bazel). Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
LIB_MODEL, SDC_FILE_EXTRA, MOCK_ALU_OPERATIONS, MOCK_ALU_WIDTH and MIN_CLK_ROUTING_LAYER are read by individual designs, not by ORFS itself. They belong in user_arguments on the orfs_flow() call site; landing them in the global variables.yaml conflated project knobs with ORFS knobs. Designs that reference these variables (asap7/gcd-ccs, asap7/mock-cpu, asap7/mock-alu, asap7/swerv_wrapper, asap7/riscv32i-mock-sram) now hit bazel-orfs's variable check at load time. Re-enabling them needs orfs_design() to forward user_arguments through to orfs_flow(). SYNTH_NUM_PARTITIONS stays — bazel-orfs auto-injects it for SYNTH_HIERARCHICAL designs and a downstream variables.yaml is the only hook that gates the validator today. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
- variables.yaml: drop SYNTH_NUM_PARTITIONS. ORFS doesn't read it; only bazel-orfs's parallel-synth wrapper does, and that's a bazel-orfs internal concern. - .bazelrc: drop --experimental_isolated_extension_usages. We don't use isolate=True on any use_extension call. - flow/designs/asap7/minimal/BUILD.bazel: drop the orfs_design loads the file no longer needs since orfs_design isn't called here. - bazel-orfs.md: drop the "Local bazel-orfs" section and update the add-a-design snippets to use the new design.bzl macros. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
These three designs fail to load at all under bazel (missing :macros.v / :adjusted-gf180mcu_*.lef targets and SYNTH_NUM_PARTITIONS validation), so the regenerated thresholds had no effect anyway. The branch picked them up via the soft-merge; restore master's values. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
bazel-orfs auto-injects SYNTH_NUM_PARTITIONS into the orfs_flow() arguments dict when SYNTH_HIERARCHICAL=1, but its check_variables() walks every key in arguments and fails on anything not in the downstream variables.yaml -- so the validator was complaining about a variable bazel-orfs put there itself. ORFS doesn't read it, so adding it to ORFS variables.yaml is wrong. Patch private/stages.bzl to populate BAZEL_VARIABLE_TO_STAGES with SYNTH_NUM_PARTITIONS and merge BAZEL_STAGE_TO_VARIABLES into ALL_STAGE_TO_VARIABLES (it was previously declared as an empty dict and never used). To be upstreamed. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
The variable is set in this design's config.mk but read nowhere in ORFS or OpenROAD. With strict variable validation in bazel-orfs, it was the last thing keeping bp_fe_top from loading. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
ORFS variables.yaml defaults SYNTH_SKIP_KEEP to "0" and emits 'export SYNTH_SKIP_KEEP?=0' via defaults.py. bazel-orfs's synth_partition.sh tested the env var with [ -n "$SYNTH_SKIP_KEEP" ], which is true for any non-empty string -- so "0" took the skip-keep branch and grep'd for 1_1_yosys_canonicalize.rtlil that wasn't in the partition action's sandbox. Switch the test to an explicit "1" comparison. Verified with bazelisk build //flow/designs/nangate45/bp_be_top:bp_be_top_synth, which now completes (was failing on the spurious grep). Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
The sed-based parser used greedy '.*\\[' / '\\].*' regexes. Slang elaborates parameterized instances into names that contain '[' and ']' (e.g. 'tcdm_adapter\$mempool_group.gen_tiles[0].i_tile.gen_banks[0]'), so the greedy match strips most of the JSON and leaves a single nonsense module name like '0'. nangate45/mempool_group hit this and its partition action would print 'synthesizing 1 modules: 0' before failing with 'Module \`0' not found'. Module names cannot contain '"', so 'grep -oE "\\"[^\"]+\\""' followed by 'tail -n +2' (skip the "modules" key) is a safe parse without greedy backtracking. Verified with 'bazelisk build //flow/designs/nangate45/mempool_group:mempool_group_synth', which now completes. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
When @orfs is fetched as a non-root dep (e.g. by tools/OpenROAD/MODULE.bazel), the downstream module brings its own openroad/qt-bazel/bazel-orfs/yosys-slang pins and orfs.default() configuration -- our overrides at root are duplicated or out of place. Previously tools/OpenROAD carried bazel-orfs-patches/0035 to strip those declarations from our MODULE.bazel at consumption time. With dev_dependency = True on the bazel_dep, use_extension, and register_toolchains lines that only matter at root, Bazel ignores them automatically when @orfs is non-root, so the patch becomes unnecessary. Verified at root with bazelisk query. Drops the unused makefile/makefile_yosys/pdk/variables_yaml overrides on orfs.default() too -- their defaults already point at @orfs//flow:* which resolves to our root labels. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
It's a generic ORFS convention used by hierarchical designs -- sky130hd/microwatt and sky130hd/chameleon append a glob of IPs/*.v to VERILOG_FILES via this variable. bazel-orfs's config_mk_parser puts it into the orfs_flow sources dict, where check_variables then rejects it because variables.yaml didn't list it. Add the entry so microwatt loads. (chameleon also references FP_PDN_RAIL_OFFSET/WIDTH, which are design-specific knobs read by chameleon's pdn.cfg only; those need the orfs_flow user_arguments path, not a variables.yaml entry.) Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
bazel-orfs's orfs_flow already has a user_arguments parameter that bypasses the variables.yaml validator -- intended for project-specific env vars read only by user-supplied .tcl/.mk files. orfs_design didn't forward to it, so config.mk vars like FP_PDN_RAIL_OFFSET (read by chameleon's pdn.cfg, not by ORFS) were rejected. Patch 0004 adds a user_arguments arg to orfs_design that names the config.mk vars to lift out of the validated arguments dict and into orfs_flow's user_arguments dict. Mirrored in flow/designs/design.bzl. Used in flow/designs/sky130hd/chameleon to declare FP_PDN_RAIL_OFFSET and FP_PDN_RAIL_WIDTH as user-only -- chameleon now loads. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
YosysHQ/yosys 167c6c4 ("Replace deprecated Tcl API to fix
use-after-free", povik, 2026-03-06) replaces five Tcl_SetResult(...,
TCL_VOLATILE) callsites in kernel/tclapi.cc with Tcl_SetObjResult +
Tcl_NewStringObj, the right idiom now that Tcl_SetResult is a macro
under Tcl 9.
Without it, rtlil::get_attr -string returns memory whose backing
std::string has already been destructed, producing module names with
stray control characters when synth_wrap_operators.tcl concatenates
${base}_${suffix}. Symptom: 'Found control character or space (0x18)
in string \\K B-W_KOGGE_STONE'.
Fix is in yosys main but not yet in BCR-tagged 0.62. Carry as patch
on the BCR pin via single_version_override.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Bump bazel-orfs to b1ceeb28 (head of The-OpenROAD-Project/bazel-orfs#719, "feat: support archive_override for ORFS pin"). All four bazel-orfs patches carried in this PR are upstreamed there: * 0001-stages-register-bazel-injected-vars-in-validator.patch * 0002-synth_partition-fix-SYNTH_SKIP_KEEP-truthy-check.patch * 0003-synth_partition-parse-kept_modules-json-without-greedy-sed.patch * 0004-orfs_design-forward-user_arguments-to-orfs_flow.patch so the patch files and the bazel/bazel-orfs-patches/ directory are removed. Co-Authored-By: Claude Opus 4.7 (1M context) <noreply@anthropic.com> Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
The carried patch (yosys upstream commit 167c6c4, "Replace deprecated Tcl API to fix use-after-free") was upstreamed into BCR yosys 0.62.bcr.2 via bazel-central-registry#8636. bazel-orfs already dropped the same patch in commit 78f19f25 (\"chore: bump yosys to 0.62.bcr.2 and drop carried patches\"); we forked from a state that pre-dated that absorption. yosys-slang stays — it's the runtime slang.so plugin we still need to build from source for SYNTH_HDL_FRONTEND=slang. OpenROAD's tools/OpenROAD/MODULE.bazel sidesteps both by pinning a pre-d11ce8a bazel-orfs that pulls yosys+slang out of the ORFS docker image. Co-Authored-By: Claude Opus 4.7 (1M context) <noreply@anthropic.com> Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Address hzeller's review feedback on PR The-OpenROAD-Project#4208: 1. Replace opaque `orfs_design(designs = DESIGNS)` with explicit `orfs_design(config = "config.mk")` so BUILD files show what drives the build. The DESIGNS dict is baked into a generated wrapper in @orfs_designs//:designs.bzl. 2. Remove all `exports_files()` calls — the orfs_design macro now creates filegroups for design files (config, lef, lib, gds, verilog) with public visibility instead. 3. Source design BUILD files use `files("verilog")` macro which now creates filegroups without exports_files. The bazel-orfs API change is carried as a patch on the pinned commit; will be upstreamed to bazel-orfs once stable. Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com> Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Match the naming convention used in tools/OpenROAD. Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com> Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Signed-off-by: Martin Povišer <povik@cutebit.org>
Signed-off-by: Martin Povišer <povik@cutebit.org>
Signed-off-by: github-actions[bot] <github-actions[bot]@users.noreply.github.com>
| Metric | Old | New | Type | | ------ | --- | --- | ---- | | cts__timing__setup__tns | -359.0 | -356.0 | Tighten | | globalroute__antenna_diodes_count | 1355 | 1153 | Tighten | | globalroute__timing__setup__tns | -365.0 | -345.0 | Tighten | | detailedroute__antenna__violating__nets | 0 | 1 | Failing | | detailedroute__antenna_diodes_count | 1406 | 1513 | Failing | | finish__timing__setup__tns | -364.0 | -349.0 | Tighten | | finish__timing__hold__tns | -7.72 | -7.01 | Tighten | | finish__design__instance__area | 5572106 | 5571612 | Tighten | Signed-off-by: Matt Liberty <mliberty@precisioninno.com>
…t-staging/uW-metrics designs/sky130hd/microwatt/rules-base.json updates:
| Metric | Old | New | Type | | ------ | --- | --- | ---- | | cts__timing__setup__tns | -356.0 | -359.0 | Failing | | globalroute__antenna_diodes_count | 1153 | 1355 | Failing | | globalroute__timing__setup__tns | -345.0 | -365.0 | Failing | | detailedroute__antenna__violating__nets | 1 | 0 | Tighten | | detailedroute__antenna_diodes_count | 1513 | 1406 | Tighten | | finish__timing__setup__tns | -349.0 | -364.0 | Failing | Signed-off-by: Matt Liberty <mliberty@precisioninno.com>
…t-staging/secure-syn-bringup Opt in first 8 designs to use 'syn'
Signed-off-by: Matt Liberty <mliberty@precisioninno.com>
…t-staging/log-synth-syn add log_cmd in scripts/synth_syn.tcl
…t-staging/uW-metrics designs/sky130hd/microwatt/rules-base.json updates:
Brings up the GT2N 2nm GAAFET PDK with buried-power-rail (BSPDN) and
runs gcd through it end-to-end with the OpenROAD changes on the
bspdn branch of tools/OpenROAD.
* flow/platforms/gt2n/ new platform:
config.mk top-level platform variables.
fastroute.tcl, pdn.tcl, setRC.tcl, tapcell.tcl, cells_clkgate.v
ORFS step config; PDN is BPR followpins
only (backside rails come from elsewhere).
lef/, lib/, gds/ copy of the GT2N tt w31 LVT collateral.
gt2.lyt, gt2.lyp KLayout tech + per-layer colors (rainbow
for front-side M0..M13 + RDL, warm/red
shades for backside BPR/BM*/BRDL).
gt2.layermap LEF layer -> GDS layer mapping.
LICENSE, README.md upstream attribution.
The local copy of gt2_6t_w31_lvt.lef carries a small authoring fix
on the gt2_6t_tap_w31_lvt cell: BPR shapes that were declared as
OBS are moved into a second PORT on each PG pin so the LEF
correctly encodes the M1<->BPR bridge. Suggested upstream as
azadnaeemi/GT2N#12.
* flow/designs/gt2n/gcd/ new design:
config.mk, constraint.sdc
* tools/OpenROAD bump to bspdn tip (0e7eabb59d) which adds
isBackside()/LEF58_BACKSIDE support and
filters backside layers out of DRT.
* tools/yosys pin to v0.64 release (6d2c445a) which
works around the Ubuntu 24.04 / glibc 2.39
yosys-abc pipe deadlock in newer SHAs.
* .gitignore whitelist flow/platforms/gt2n.
Verified: gt2n/gcd produces 6_final.{def,gds,odb,sdc,v}.
Signed-off-by: Matthew Guthaus <mrg@ucsc.edu>
Signed-off-by: Matthew Guthaus <mrg@ucsc.edu>
BPR followpins on their own do not stitch the per-row vdd/vss rails together, so the backside grid was a chain of disconnected horizontal strips. Add a two-layer perpendicular mesh (BM1 vertical, BM2 horizontal) plus BV0/BV1 connects, modeled on asap7's M5/M6 over M1/M2 followpin pattern. Top of the standard-cell grid is now BM2. Also adds resistance values for the backside cut layers (BV0..BV4) to setRC.tcl so PSM's analyze_power_grid does not error out with PSM-0021 when the PG network includes backside vias. Calls out that every RC value in this file is a placeholder, not silicon-calibrated. Verified end-to-end on gt2n/gcd: 873s wall time, 0 DRC violations, 0 ANT violations. Signed-off-by: Matthew Guthaus <mrg@ucsc.edu>
Upstream commit 42e1034 ("Update gt2_6t_w31_lvt.lef") moves the BPR
shapes on the tap cell from OBS to PORT (the issue The-OpenROAD-Project#12 fix we
needed), but in the same commit it also renames the macro
`gt2_6t_tap_w31_lvt` into a split `gt2_6t_tapfspdn_w31_lvt` /
`gt2_6t_tapbspdn_w31_lvt` pair in the LEF and lib. The matching GDS
cells for the new names were not added upstream
(azadnaeemi/GT2N#16), so the post-rename PDK is internally
inconsistent: the LEF/lib advertise two new tap-cell names, but
neither exists in the GDS, only the original `gt2_6t_tap_w31_lvt`
does. KLayout GDS-merge at the end of the flow cannot resolve the
tap instances and the final GDS is incomplete.
Keep the BPR PORT geometry from the upstream commit (this is the
fix we wanted) but undo the rename here: collapse the LEF macros
and lib cells back into a single `gt2_6t_tap_w31_lvt`, point
TAP_CELL_NAME and DONT_USE_CELLS at it, and update the README to
explain the situation and link to the upstream issue tracking the
GDS gap. Revisit once upstream The-OpenROAD-Project#16 is resolved.
Smoke: gt2n/gcd 2_3_floorplan_tapcell clean (110 endcaps + 28
tapcells inserted).
Signed-off-by: Matthew Guthaus <mrg@ucsc.edu>
Signed-off-by: Matthew Guthaus <mrg@ucsc.edu>
M5 was a conservative bring-up cap so routing did not have to deal with the full GT2N stack while we were stabilising the platform. The tech has frontside routing layers M0..M13 + RDL; M13 is the topmost regular routing layer (RDL is the redistribution / top-metal). Open up MAX_ROUTING_LAYER to M13 so larger designs can use the full BEOL. Verified end-to-end on gt2n/gcd: full flow through 6_final clean, final GDS produced, no DRC / antenna violations. Signed-off-by: Matthew Guthaus <mrg@ucsc.edu>
The platform was bringing up a single (w31, lvt) corner. Upstream 308b221 ships ten W/Vt combinations at tt 0.7V/25C: w13 (13 nm nanosheet) and w31 (31 nm), each in hvt / svt / lvt / ulvt / elvt. All ten use the same gt2_6t site (0.042 x 0.144) and the same tech LEF, so any subset of (W, Vt) tuples can coexist in a single block and synthesis can size + W/Vt-trade across the full menu. Vendor the nine new (W, Vt) triplets directly from upstream 308b221 (LEF + lib + GDS, all with the tap-cell split intact), and parameterise the platform config on two ordered lists modelled on asap7's ASAP7_USE_VT pattern: GT2N_USE_W nanosheet-width families to load. Default: 'w31'. GT2N_USE_VT Vt flavors to load. Default: 'lvt hvt svt ulvt elvt'. The first word of each list is the primary value. The (primary W, primary Vt) tuple drives canonical single-cell references (tap, tiehi/tielo, buffer, ABC driver); the rest of the Cartesian product rides along as additional LEF / lib / GDS so Yosys + ABC see every loaded sizing option. Includes the upstream lib refresh (default_operating_conditions, voltage_map, pg_pin annotations on every cell). Smoke: gt2n/gcd full flow clean, EXIT=0. Signed-off-by: Matthew Guthaus <mrg@ucsc.edu>
The platform ships both nanosheet widths (w13 = 13 nm sheet, w31 = 31 nm sheet) and they share the same gt2_6t site, so loading both into a single block costs nothing in placement and lets ABC pick across the full 2 W x 5 Vt = 10 (W, Vt) menu. Default GT2N_USE_W to "w31 w13" so every gt2n design sees the menu without having to override the list in each per-design config.mk. Single-width builds still work by setting GT2N_USE_W to "w31" or "w13" in the design config. Signed-off-by: Matthew Guthaus <mrg@ucsc.edu>
The C values in setRC.tcl were placeholders ("the ICT shipped with the
PDK does not contain extracted C ... should be replaced with values
from a calibrated RCX/QRC model before treating any C-derived quantity
as physical"). The R values were derived from Fig 1(b) of the GT2N
paper and were already grounded, but the via R was a fake "scaled
roughly by cut size" stand-in.
The PDK's StarRC ITF file (GT2N/nxtgrd/GT2.itf) carries enough physical
data to derive both R and C analytically: per-layer RPSQ, dielectric
thickness and permittivity above and below each conductor, conductor
thickness, WMIN, SMIN, and per-VIA RPV. Use those to compute:
R/um = RPSQ / WMIN
C/um = (Ca + Cb) * fringe_factor + 2 * Cc (fF/um, then to pF/um)
Ca = eps0 * eps_above * W / d_above
Cb = eps0 * eps_below * W / d_below
Cc = eps0 * eps_side * T_wire / SMIN
fringe_factor = 1.5x coarse fringe-field correction
Via R = RPV (single via, from ITF VIA entries)
itf_to_rc.py drops next to the platform so the derivation is
reproducible; setRC.tcl is its output rendered into set_layer_rc
commands plus the existing set_wire_rc selections.
These numbers are still approximate -- the proper fix is real RCX
extraction (run a 3D solver, e.g. FasterCap, against OpenRCX's pattern
DEFs and feed the resulting SPEF to OpenRCX generate_rules.tcl). The
ITF/NXTGRD/QRC files in GT2N/ carry everything that pipeline needs.
The analytical table is the working stand-in until those rules exist.
Smoke (gt2n/gcd full flow): clean, EXIT=0. Achieved core_clock period
moves from 373.6 ps (placeholder C) to 344.6 ps (analytical C); slack
goes from 106.8 ps to 137.3 ps. Lower C reduces wire delay, so timing
reports tighter -- consistent with the analytical C being ~33-60%
below the placeholder, which itself had no physical grounding.
Signed-off-by: Matthew Guthaus <mrg@ucsc.edu>
Default tapcell.tcl was using `-distance 5` (5 um between taps along each row), which is loose enough that small designs end up with a single tap column. The gt2n tap cell does double duty: it is both the well/body-bias tap (the conventional purpose) and the per-row M1<->BPR or sole BPR riser for the BSPDN power network -- each tap is the only hard via from the cell row's BPR rail into the BSPDN power source. Tap density therefore directly sets per-row BPR resistance and the worst-case BSPDN IR drop, which is not true in flows where taps only exist for latchup avoidance. Drop `-distance` to 2 um. On gt2n/gcd (4-5 um core side, 55 rows): -distance 5 2 tapcells 28 114 (+4x) vdd worst 10.9 mV 8.49 mV (-22%) vdd avg 2.62 mV 2.59 mV vss worst 7.25 mV 7.35 mV (essentially same, already well distrib) vss avg 2.27 mV 2.27 mV (IR numbers from analyze_power_grid on 6_final.odb with leakage-only currents -- absolute drop is small at this design size, but the worst-case-vdd improvement is what we expect from more BPR risers.) Detail-route runtime goes up roughly 3x because of the denser obstacle field, but converges cleanly to 0 DRC + 0 antenna. Signed-off-by: Matthew Guthaus <mrg@ucsc.edu>
Adds jpeg_encoder as a larger reference benchmark alongside gcd and aes -- representative of designs that meaningfully exercise the upper-stack routing layers and the multi-W / multi-Vt library menu. config.mk mirrors the asap7 / nangate45 jpeg configurations (ABC_AREA=1, TNS_END_PERCENT=100, conservative CORE_UTILIZATION). constraint.sdc uses a 1500 ps clock as a first-pass loose target; period_min lands around 950 ps so the design has substantial headroom to tighten once OpenRCX rules replace the analytical RC. Signed-off-by: Matthew Guthaus <mrg@ucsc.edu>
The platform exposes metal up to M13, but the reference designs route well below that (gcd uses up to M5, jpeg M9, aes M10; layers above carry no wire). Pinning MAX_ROUTING_LAYER at the platform M13 top forced detailed routing to build its grid graph, via stack, and DRC checks across the full layer range for every design, inflating runtime and memory. Move MAX_ROUTING_LAYER out of the platform config (leaving a comment) and set it per design at the highest layer each actually uses. gcd@M5 was verified to route DRC-clean; aes/jpeg caps only drop layers that carry zero wire. Signed-off-by: mrg <mrg@ucsc.edu>
Signed-off-by: Matt Liberty <mliberty@precisioninno.com>
Note where GT2.itf comes from (the StarRC interconnect tech file shipped with the GT2N PDK, not in this repo) and the matching NXTGRD/QRC files, mirroring the existing setRC.tcl header, and point readers to the platform README for additional GT2N information. itf_to_rc.py also flags that __main__ hardcodes a local path to the ITF that must be adjusted to a local PDK copy. Comments only. Signed-off-by: mrg <mrg@ucsc.edu>
…t-staging/update-or update OpenROAD
Add rules-base.json baselines for the gcd, aes, and jpeg gt2n designs, generated via 'make metadata' + 'make update_ok' from a clean run at each design's committed MAX_ROUTING_LAYER (M5/M10/M9) on the pinned OpenROAD. All three route DRC-clean; metadata-check passes with 0 failures/warnings. This gives the gt2n designs CI metadata baselines (previously absent). Signed-off-by: mrg <mrg@ucsc.edu>
gt2n: add 2nm BSPDN platform with gcd and aes designs
Sequence repair_timing setup repair coarse->fine across the flow using the COARSE/FINE -phases tokens from the OpenROAD submodule: - floorplan: COARSE (+ skip last gasp) - resize (3_4): COARSE FINE (opt-in via ENABLE_PLACE_REPAIR_TIMING) - post-dpl (new 3_6 target): COARSE FINE - CTS: COARSE FINE - global route: COARSE FINE Bumps tools/OpenROAD to VLSIDA/OpenROAD @ 9ddd6967fe (branch coarse-fine), which adds the COARSE/FINE phase tokens and two move-generator crash fixes. Evaluation only; depends on an out-of-tree OpenROAD branch -> not for merge. Signed-off-by: Matthew Guthaus <mrg@ucsc.edu>
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Re-targeting to upstream The-OpenROAD-Project/OpenROAD-flow-scripts (correct base; clean diff). |
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repair_timingflow. It depends on an out-of-tree OpenROAD branch, so it is not mergeable.Flow change: sequences setup repair coarse→fine via new
COARSE/FINErepair_timing -phasestokens:COARSE(+ skip last gasp)COARSE FINE(opt-in viaENABLE_PLACE_REPAIR_TIMING)COARSE FINECOARSE FINECOARSE= sizeup/clone/buffer/split;FINE= vt_swap/pin-swap/size_down/unbuffer/reroute.OpenROAD dependency: submodule bumped to
VLSIDA/OpenROAD@coarse-fine(9ddd6967fe) — https://github.com/VLSIDA/OpenROAD/tree/coarse-fine — which adds theCOARSE/FINEphase tokens and two move-generator crash fixes (RerouteGenerator hierarchical-net; SizeDownFanoutGenerator dangling-path).Verified locally: gcd/aes/ibex on nangate45 + asap7 all complete (rc=0, no crashes).
Note: asap7 QoR is noisy run-to-run (non-deterministic integrated-
synsynthesis).