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New platform: WeActStudio.BluePill-Plus-GD32#2071

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ALTracer wants to merge 280 commits into
blackmagic-debug:mainfrom
ALTracer:feature/bluepillplus-platform
Draft

New platform: WeActStudio.BluePill-Plus-GD32#2071
ALTracer wants to merge 280 commits into
blackmagic-debug:mainfrom
ALTracer:feature/bluepillplus-platform

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@ALTracer

@ALTracer ALTracer commented Feb 9, 2025

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Detailed description

  • This is a whole new cleaned up platform.
  • The existing problems are mismatching LED pins and incomplete mappings of board features between stlink/swlink and bluepillplus. In-tree platforms default to 72 MHz and do not leverage full potential of Gigadevices. Unmapping own SWJ-DP is not always acceptable, and stlink pinout is just weird.
  • This PR solves that by providing all necessary bindings in a dedicated platform, with chip detection and PLL configuration.

I do not expect this to be merged, because in-tree -Dprobe=bluepill already does provide some functionality. I do not implement vanilla PC13 bluepills, it's impossible for me to discern these from bluepillplus. This platform has feature parity with blackpill-f4, except I'm dissatisfied with its USBOTG-FS DWC2 bugs.
Choice of USART for Aux and SWO was influenced by existing 2x128 aux_serial DMA ping-pong buffers, which are insufficient for 1024 byte Zmodem packet operation I need in DUT firmware. So SWO is faster for burst operation. When that's refactored, I'll swap them back such that 6Mbaud VCP is possible.

TODO: I'd like to use platform_ident to indicate autodetection results, and to leverage meson options to pick linkerscripts which influence flash size for drivers and RAM size for heap/buffers/SWO.

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@dragonmux dragonmux added this to the v2.1 release milestone Feb 9, 2025
@dragonmux dragonmux added the Foreign Host Board Non Native hardware to runing Black Magic firmware on label Feb 9, 2025
@ALTracer ALTracer force-pushed the feature/bluepillplus-platform branch from 1d39692 to fb6cb65 Compare March 6, 2025 04:41
@ALTracer ALTracer force-pushed the feature/bluepillplus-platform branch from fb6cb65 to b84edbf Compare March 23, 2025 13:17
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This now supports 96 MHz APM32F103CB.
As well as classic 72MHz STM32F103CB, 96MHz GD32F103CB and 120MHz GD32F303CC (Cortex-M4), differentiating on CoreSight ROM table PIDR value. Unique ID in DESig is not exactly helpful, but serialno.c still works.
All four WeActStudio.BluePill-Plus-* boards have identical PCB, with LED on PB2 active-high, and button on PA0, USB FS device on type-C port, and 8 MHz crystal. All four chips lack USB DFU bootloader capability, only USART1 is supported for initial flashing, if you don't have another USB-SWD/JTAG adapter.
CH32F103C8 not considered due to insufficient Flash capacity.

@ALTracer ALTracer force-pushed the feature/bluepillplus-platform branch from ed79933 to f6dab76 Compare July 13, 2025 14:53
@ALTracer ALTracer force-pushed the feature/bluepillplus-platform branch from f6dab76 to 97627db Compare July 23, 2025 19:23
dragonmux added 23 commits March 8, 2026 16:27
…adability in the USB configuration setup code
…per use of atomics, resulting in smaller and more correct code
…roper use of atomics, resulting in smaller and more correct code
…change notifications so it's a little more responsive without being overwhelming for traffic
…correctly and the pins are driven suitably hard
…ng the dual target serial interfaces up to the second host serial interface
dragonmux and others added 29 commits May 19, 2026 01:49
…K blocks as found on the Lattice Versa boards
…ommand

This was found by looking at the JTAG traffic the lattice diamond programmer generated when programming the ispCLOCK device, and the name was extracted from a JED for the ispCLOCK being converted to an svf file, as the name for this command was included in a comment in the resulting file.
…_done`

These now properly handle the setup and exit for programming ispCLOCK devices
…e attached ispCLOCK device.

After much mucking about and trying to figure out what the lattice programmer was doing and how much of it is required, the method for properly programming the ispCLOCK devices was figured out, which does include wiggling TCK, for some reason....
This is used so we can verify the contents of the the ispCLOCK device and ensure that the correct configuration for it was written
* Extract the memory write into a dedicated helper function
* Wrap it into TRY-CATCH macros
* Drop the extraneous 10ms delay introduced back in PR2072
* Uses PB2 LED, USB FS device with external 1.5k pullup
* BMD bootloader also uses PA0 button and boot magic flags
* WeActStudio.BluePill-Plus boards have a DNF SOIC-8
  footprint for 25-series SPI NOR flash, wired to PA4/5/6/7.
* Add the pin mappings regardless of the platform flavour.
* Rely on DBGMCU_IDCODE and SCB_CPUID
@ALTracer ALTracer force-pushed the feature/bluepillplus-platform branch from d075c2b to 1c31cc6 Compare June 13, 2026 20:24
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9 participants