RISC-V XV6/Linux SoC, marchID: 0x2b, 0x34
-
Updated
May 29, 2026 - Verilog
RISC-V XV6/Linux SoC, marchID: 0x2b, 0x34
ElemRV - End-to-end Open-Source RISC-V Microcontroller
A parameterizable Weight-Stationary 2D Systolic Array implemented in Verilog for hardware-accelerated matrix multiplication
Designinig a Pipeline in-order 5 stage RISC-V core RV32I-MAF
SVDB Gateway : DPI-C library that links SystemVerilog simulations with external SQLite databases for configuration, logging, and verification.
An open source SoC project for the VLSI 2 class at ETHZ. Selected as one of the best design and taped out in IHP 130nm technology
Development of an OpenSource FreeCAD plugin for the BMBF project DI-Passionate to enable chip-packaging
Chipro First Agentic EDA Design System
VSDIAT Documentation- Openlane/Sky130- MIT
this verilog repo is my commitment to cover the all basic stuffs and syntax of the verilog in one week +1-2 days more if required and will upload the projects made with the verilog in this repo too
A BJT NPN transistor, who's layout resembles it's electronics symbol.
setup ur oown deployment , dont make any changes in mine. samjhe ke nhi
The Soil Moisture Irrigation Controller is a finite state machine (FSM) that automatically controls an irrigation pump based on soil moisture levels.
Add a description, image, and links to the chipdesign topic page so that developers can more easily learn about it.
To associate your repository with the chipdesign topic, visit your repo's landing page and select "manage topics."